shader: validate the IR once, at SPIR-V emission

src/graphics/shader/recompiler/backend/spirv/SpirvEmitter.cpp

@@ -219,7 +219,7 @@ std::vector<uint32_t> EmitProgram(IR::Program& program, ShaderStageInputInfo inp
 	    !program.shader_info_complete) {
 		Fail(program, "SPIR-V emitter requires a fully planned native shader program");
 	}
-	IR::ValidateProgram(program, true);
+	IR::ValidateProgram(program);
 	program.bindings = {.push_data_start_dword = push_data_start_dword};
 	EmitterState state(program, input_info, profile);
 	if (emit_debug_info) {

src/graphics/shader/recompiler/frontend/translate/Translate.cpp

@@ -1446,7 +1446,6 @@ IR::Program TranslateProgram(const Decoder::Program& decoded, const CFG::Graph&
 		}
 		translator.AddBranchCondition(cfg, cfg_block, *block);
 	}
-	IR::ValidateProgram(result, false);
 	return result;
 }
 

src/graphics/shader/recompiler/ir/Program.cpp

@@ -244,7 +244,7 @@ bool HasShaderMemoryWrites(const Program& program) {
 	return false;
 }
 
-void ValidateProgram(const Program& program, bool require_ssa) {
+void ValidateProgram(const Program& program) {
 	if (program.blocks.size() != program.block_storage.size()) {
 		return Fail("value IR block storage is inconsistent");
 	}
@@ -400,7 +400,7 @@ void ValidateProgram(const Program& program, bool require_ssa) {
 			} else {
 				saw_non_phi = true;
 			}
-			if (require_ssa && IsRegisterStatePseudo(inst.GetOpcode())) {
+			if (IsRegisterStatePseudo(inst.GetOpcode())) {
 				return Fail(fmt::format("register-state pseudo {} survived SSA rewrite",
 				                        ValueOpcodeName(inst.GetOpcode())));
 			}

src/graphics/shader/recompiler/ir/ShaderIR.h

@@ -751,7 +751,7 @@ uint32_t StorageBufferElementBits(const Program& program, const MemoryInfo& memo
 std::string ProgramToString(const Program& program);
 bool        HasShaderMemoryWrites(const Program& program);
 
-void  ValidateProgram(const Program& program, bool require_ssa);
+void  ValidateProgram(const Program& program);
 bool  EquivalentValue(const ResourcePlan& program, Value left, Value right);
 bool  EquivalentSelectorDomain(const ResourcePlan& program,
                                const DescriptorSource::IndirectDescriptor& left,