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shader: implement BUFFER_ATOMIC_FMAX
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@@ -132,7 +132,8 @@ bool IsAtomic(IR::Opcode op) {
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case IR::Opcode::AtomicAndU32:
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case IR::Opcode::AtomicOrU32:
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case IR::Opcode::AtomicXorU32:
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case IR::Opcode::AtomicFMinF32: return true;
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case IR::Opcode::AtomicFMinF32:
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case IR::Opcode::AtomicFMaxF32: return true;
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default: return false;
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}
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}
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@@ -142,6 +143,9 @@ uint32_t BufferAddressOperandCount(const IR::Instruction& inst) {
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}
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bool ValidateInstructionContract(const IR::Instruction& inst, std::string* error) {
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if (static_cast<size_t>(inst.op) >= static_cast<size_t>(IR::Opcode::Count)) {
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return Fail(error, "IR instruction opcode is out of range");
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}
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if (inst.src_count > std::size(inst.src)) {
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return Fail(error, "instruction source count exceeds fixed IR storage");
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}
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@@ -201,6 +205,12 @@ bool ValidateInstructionContract(const IR::Instruction& inst, std::string* error
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inst.src_count != 2)) {
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return Fail(error, "storage image instruction has an invalid resource class");
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}
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const auto float_atomic =
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inst.op == IR::Opcode::AtomicFMinF32 || inst.op == IR::Opcode::AtomicFMaxF32;
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if (float_atomic &&
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(kind != IR::ResourceKind::Buffer || inst.src_count != buffer_address_count + 1u)) {
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return Fail(error, "floating-point atomic instruction must target a buffer");
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}
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if (IsAtomic(inst.op) &&
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!((kind == IR::ResourceKind::Buffer && inst.src_count == buffer_address_count + 1u) ||
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((kind == IR::ResourceKind::Lds || kind == IR::ResourceKind::Gds) &&
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@@ -489,6 +499,13 @@ bool EmitProgram(const IR::Program& program, const IR::ResourceSnapshot& resourc
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AllocateBlockLabels(state, program);
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AllocateDispatcherState(state, program);
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EmitFunction(state, program);
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if (state.unsupported_ir_instruction) {
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char pc[9] {};
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std::snprintf(pc, sizeof(pc), "%08x", state.unsupported_ir_pc);
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return Fail(error, "SPIR-V emitter has no handler for IR opcode " +
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std::string(IR::OpcodeName(state.unsupported_ir_opcode)) +
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" at pc 0x" + pc);
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}
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ReportReserveExceeded(program, "registers", state.registers.size());
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ReportReserveExceeded(program, "inputs", state.inputs.size());
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