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shader: expose graphics compute queue fields to GETREG
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@@ -1356,7 +1356,8 @@ IR::Program TranslateProgram(const Decoder::Program& decoded, const CFG::Graph&
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(options.input_info.compute->float_mode & 0x10u) == 0;
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for (const auto& cfg_block: cfg.blocks) {
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auto* block = blocks_by_id.at(cfg_block.id);
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Translator translator(result, block, vector_limit, flush_f32_inputs);
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Translator translator(result, block, vector_limit, flush_f32_inputs,
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options.stage == ShaderType::Compute && !options.input_info.compute->async_compute);
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for (uint32_t index = cfg_block.inst_begin; index < cfg_block.inst_end; index++) {
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const auto& instruction = decoded.instructions[index];
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if (IsCodeTableLoad(cfg, instruction.pc)) {
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