gpu: preserve ordered-append command order

This commit is contained in:
shadowbeat070 committed 2026-10-19 11:46:39 +02:00
1 parent e5f0ee7fc2
commit d4465faa79
3 files changed
+155 -1

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@@ -447,7 +447,27 @@ void RenderExecutor::DispatchDirect(uint64_t submit_id, CommandBuffer& buffer,
}
vk_buffer.bindPipeline(vk::PipelineBindPoint::eCompute, pipeline.pipeline);
vk_buffer.dispatch(thread_group_x, thread_group_y, thread_group_z);
constexpr uint32_t DISPATCH_INITIATOR_ORDERED_APPEND_ENABLE = 1u << 3u;
const uint64_t group_threads = uint64_t {std::max(input_info.threads_num[0], 1u)} *
std::max(input_info.threads_num[1], 1u) *
std::max(input_info.threads_num[2], 1u);
if ((mode & DISPATCH_INITIATOR_ORDERED_APPEND_ENABLE) != 0 && program.info.uses_gds &&
group_threads <= input_info.wave_size && !input_info.lds_storage) {
// A single guest wave per group can run in launch order without a device-wide
// spinlock. Keep the guest workgroup IDs when splitting the dispatch.
for (uint32_t z = 0; z < thread_group_z; ++z) {
for (uint32_t y = 0; y < thread_group_y; ++y) {
for (uint32_t x = 0; x < thread_group_x; ++x) {
if ((x | y | z) != 0u) {
ShaderAccessBarrier(vk_buffer, vk::PipelineStageFlagBits::eComputeShader);
}
vk_buffer.dispatchBase(x, y, z, 1, 1, 1);
}
}
}
} else {
vk_buffer.dispatch(thread_group_x, thread_group_y, thread_group_z);
}
Common::DebugCounters::Add(Common::DebugCounters::Counter::Dispatches);
// The removed host fence also ordered read-only dispatches before later writers.