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1,714 Commits 1 Branch 517 Tags
3c62269751a96cbbcca3a76c0d79e7c37253f033
Commit Graph
57 Commits
Author SHA1 Message Date
nmzikSenaxxMac
 		6357740fa1 shader: lower wave32 whole-wave UMin and UMax reductions to subgroup reductions 
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
 2026-10-26 05:32:02 +01:00
nmzik 67c89e0915 shader: keep the old V_PERMLANE16 destination for inactive sources without BOUND_CTRL 2026-10-25 02:20:44 +02:00
TheCruZ e864cb20bd shader: clamp V_FRACT_F16/F32/F64 results below one 2026-10-25 02:20:44 +02:00
Senaxx 77a8f30758 shader: read S_MEMREALTIME from the host device clock shifted to about 100 MHz 2026-10-23 19:48:53 +02:00
Nawid3333andnmzik d7c1896647 shader: interpolate f16 parameter halves (V_INTERP_P1LL_F16, V_INTERP_P2_F16) (#1792) 
shader: interpolate packed f16 attributes for v_interp_p1ll_f16 and v_interp_p2_f16

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-22 04:54:10 +02:00
nmzik 4a1440197f shader: share one find-first-bit lowering for S_FF0/FF1/FLBIT_I32_B64 and remove FindUMsb64 2026-10-21 22:39:34 +02:00
nmzik 6e5167598e shader: compute add-with-carry with compares and remove IAddCarry32 2026-10-21 22:28:11 +02:00
nmzik c571d8ed5a shader: remove IR opcodes and IREmitter helpers that nothing produces 2026-10-21 22:19:26 +02:00
nmzik 22ef16a044 shader: implement PS5 vector data cache invalidation 2026-10-18 15:57:14 +02:00
Nawid3333Claude Opus 5.5nmzik
 		e93b4b0378 shader: support returning 32-bit LDS compare-exchange (DS_CMPST_RTN_B32) (#1578) 
* shader: support DS_CMPST_RTN_B32

Assassin's Creed Valhalla (PPSA01490, #281) stops on DS opcode 0x30 in a
compute shader. DS compares DATA and stores DATA2, the opposite of
BUFFER_ATOMIC_CMPSWAP, so the 32-bit atomic path swaps the two for this
opcode, as the 64-bit form does.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* shader: reject unsupported GDS compare-store variant

---------

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-17 04:37:16 +02:00
Çağatay Güçlü 02ead0e2e1 shader: 64-bit buffer atomic add (BUFFER_ATOMIC_ADD_X2) 2026-10-17 04:09:54 +02:00
nmzik 302240da70 shader: lower complete wave minima for sparse fragment subgroups 2026-10-14 18:03:48 +02:00
nmzikandfxpw 26d326d1b0 shader: share bounded record descriptors for packed loads and byte stores 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 05:07:24 +02:00
nmzik 9e41d8320a shader: support returning 64-bit LDS max and compare-exchange 2026-10-13 21:33:50 +00:00
nmzikandnetwarex 984cfcebd1 shader: emit native texel offsets using sample execution context 
Co-authored-by: netwarex <mail@pety.me>
 2026-10-11 18:53:01 +02:00
nmzikandHector Mödinger S. 59183dbfa8 shader: add missing F64 VOPC compares 
Co-authored-by: Hector Mödinger S. <hectormodinger@gmail.com>
 2026-10-09 21:01:51 +02:00
nmzik 7a0e1dafd7 shader: classify native half values with shared operand decoding 2026-10-05 18:39:31 +04:00
nmzikandshadowbeat070 af3011cd69 shader: add missing 64-bit integer image atomics 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:12:06 +04:00
nmzikandshadowbeat070 e85279ea7b shader: correct DS float min/max operands and special values 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:11:48 +04:00
nmzikandshadowbeat070 d8be245c22 shader: separate legacy FP32 MAD rounding from fused FMA 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:11:48 +04:00
nmzikandÇağatay Güçlü 8274e517b2 shader: add FP64 min, max and rounding 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzikandshadowbeat070 98557a83b6 shader: implement RDNA2 DS masked OR through shared atomic updates 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzikandshadowbeat070 c17fa5b936 shader: implement RDNA2 DS forward lane permute 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzik 284d58d1d5 shader: implement RDNA2 double-precision fractional part 2026-10-04 18:39:34 +04:00
nmzikTheCruZMac
 		e4aca7a60b shader: initialize EXEC from requested dispatch thread extents 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
 2026-10-04 18:39:34 +04:00
nmzik f58014ff0e shader: preserve wave-wide vector-store completion before publication 2026-10-04 18:39:34 +04:00
fransYuhiAidaBlackCATshadowbeat070SenaxxMacAli Almohaya
 		bd611bfe15 Honor explicit gather LOD with shared image mip selection 
Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com>
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
 2026-10-03 14:19:33 +04:00
BlackCATandshadowbeat070 ef4c5baf3a Implement RDNA2 64-bit image atomic maximum 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-03 14:19:32 +04:00
Louisandnmzik b3e419ff11 shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP (#952) 
* shader: implement 32-bit RDNA2 image atomic compare-and-swap

* shader: share atomic emission and correct image barriers

---------

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-02 01:15:53 +04:00
Senaxx 0d0b215fab shader: port 64-bit ALU and atomic opcodes 2026-10-02 00:51:15 +04:00
nmzikAli AlmohayaMacSenaxxJean-Philippe
 		337f432016 shader: execute PS5 BVH intersections and local FLAT stacks 
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Jean-Philippe <github@meunier.jp>
 2026-10-02 00:51:15 +04:00
nmzikSenaxxAli Almohaya
 		581dad7dd3 shader: implement RDNA2 FP64 equality comparisons 
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
 2026-10-02 00:51:15 +04:00
nmzik 6799ecbc5b shader: add native 64-bit LDS OR with shared typed storage views 2026-09-29 19:13:33 +04:00
gohansharma79-svgandnmzik 0a5774be7b shader: support FP64 conversions used by FighterZ (#884) 
shader: support float and unsigned widening to FP64

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-09-28 17:39:31 +04:00
nmzik 0791f921f6 UFC 5 in-game (#883) 
* shader: release descriptor dependencies

* shader: simplify shared-exit control flow

* shader: fix scalar memory loads

* shader: fix LDS counter bounds

* renderer: skip inactive pixel shaders

* shader: respect FP32 mode in comparisons

* renderer: fix sampler border colors

* shader: resolve descriptors from control flow

* shader: resolve descriptors before resource planning

* shader: handle scalar guards for image bounds

* shader: handle reduced guards for image loops

* shader: fix wave guards and material indices

* shader: preserve scalar buffer offset alignment and carry

* shader: prove masked loop bounds across iteration transitions

* shader: preserve source and IR before resource tracking failures

* shader: track material keys selected from active lanes

* shader: remove obsolete post-dominator analysis

* shader: follow bounds guards through control-flow joins
 2026-09-28 16:03:05 +04:00
nmzik 16b83a034c Shader: execute RDNA2 FP64 shadow arithmetic and log denorm limits 
Shader: disable FP64 denorm preservation controls for now
 2026-09-26 15:15:35 +04:00
nmzikfoufouadifransfxpwMatthew Hurley
 		cf268af839 Shader: implement RDNA2 image atomic float maximum 
Shader: implement RDNA2 image atomic float minimum

Co-authored-by: foufouadi <attar.foued@gmail.com>
Co-authored-by: frans <francois.att@gmail.com>
Co-authored-by: fxpw <fxpw@outlook.com>
Co-authored-by: Matthew Hurley <171001439+theantipopau@users.noreply.github.com>
 2026-09-26 15:15:35 +04:00
nmzik 7516068662 gpu: compile RDNA2 tessellation through native LS HS and TES stages 2026-09-14 06:58:32 +04:00
nmzik e04007a7c6 shader: implement DS_INC_RTN_U32 and DS_DEC_RTN_U32 2026-09-09 12:56:20 +04:00
nmzikBrandon Strongfxpwshadowbeat070
 		3213934d42 shader: run merged geometry stages as mesh shaders 
Co-authored-by: Brandon Strong <brandostrong@gmail.com>
Co-authored-by: fxpw <fxpw@outlook.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-09-05 08:32:23 +04:00
GodsWill Devandnmzik 2fe5c150bc shader: implement BUFFER_ATOMIC_CMPSWAP (#357) 
shader: implement RDNA2 buffer atomic compare swap

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-09-03 23:34:34 +02:00
nmzik b3c8f91a84 graphics: implement RDNA2 buffer atomic swap x2 2026-09-03 10:17:04 +02:00
nmzik 858c18468b graphics: implement RDNA2 buffer atomic OR x2 2026-09-03 05:39:05 +02:00
Brandon Strong 2d5023fda2 shader: support IMAGE_ATOMIC_SWAP (#456) 2026-09-03 03:37:55 +02:00
nmzik e591a66b67 Revert "shader: preserve raw VCC bits in S_MOV_B64 (#418)" 
This reverts commit 6758d67942.

An EXEC pair loses its mask provenance and falls into the raw high-word path. The saved all-ones high word then keeps waterfall branches true and wedges GPU work.
 2026-09-01 07:50:37 +04:00
nomolao2-cellandnmzik 6758d67942 shader: preserve raw VCC bits in S_MOV_B64 (#418) 
* shader: preserve raw VCC bits in S_MOV_B64

* fix(shader): centralize scalar U64 mask provenance

---------

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-08-31 03:04:16 +04:00
nmzikandTechx3 5bd447d2a2 shader: implement DS_BPERMUTE_B32 
Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com>
 2026-08-29 19:23:19 +04:00
nmzikandSenaxx 5e64efce4f graphics: support RDNA2 custom pixel interpolation 
Co-authored-by: Senaxx <Senaxx@users.noreply.github.com>
 2026-08-21 23:33:40 +02:00
nmzik 49ea1680f8 graphics: use per-invocation shader masks 2026-08-21 08:03:22 +02:00
Senaxx 56a15c2036 Implement RDNA2 per-invocation scratch memory 2026-08-21 03:32:47 +02:00