Commit Graph
546 Commits
Author SHA1 Message Date
nmzikandstrxno 556538bed5 gpu: write D16 demotion results with one 16-bit store
Co-authored-by: strxno <rokas.pettersen@gmail.com>
2026-10-27 07:04:38 +01:00
Mr. Big BritchesandClaude Opus 5.5 770438cee0 ci: fix the Linux build and the macOS SRT walker test crashes (#1922)
* graphics: give InlinePageOwnerList's const_iterator iterator traits

The Linux build failed in textureCache.cpp: std::any_of over the image
owners of a page needs std::iterator_traits, which libstdc++ only fills
from the iterator's own member types. MSVC's STL and libc++ don't
consult them there, so Windows and macOS built.

Declare the five member types. The category is input, not forward,
because operator* returns a copy.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* tests: assert InlinePageOwnerList's const_iterator has an input category

Only libstdc++ needs the iterator traits for std::any_of, so removing
them would compile on Windows and macOS and break only the Linux build.
The assert fails the build on every platform instead.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* tests: serve SRT walker test loads on macOS too

FakeGuestMemory only installed its fault handler on Linux and Windows,
so on macOS the walker's deliberately faulting loads crashed
scalar_provenance, resource_materialization and resource_tracking.

Share the Linux sigaction path with macOS, read the registers from the
macOS thread state, and catch SIGBUS as well as SIGSEGV there, like the
emulator's own handler.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

---------

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 06:26:08 +01:00
f90a8b1589 graphics: decode register clears of RGBA16 UNORM, UINT and SINT and RG32 UINT and SINT targets
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Jetsku <59046009+Jetsku@users.noreply.github.com>
2026-10-26 07:43:11 +01:00
nmzikandusa-ratt 17a0f53d39 graphics: resolve MSAA color into the level and layer the texture cache placed each target at
Co-authored-by: usa-ratt <188116257+usa-ratt@users.noreply.github.com>
2026-10-26 07:43:11 +01:00
nmzikandSenaxx 943bc19f46 shader: leave the start instance out of mesh and NGG instance ID VGPRs
Co-authored-by: Senaxx <michelbeld@gmail.com>
2026-10-26 07:43:11 +01:00
26ca609236 shader: type pixel outputs of UINT and SINT render targets as integer vectors
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
2026-10-26 05:32:02 +01:00
nmzik 72d7da7266 texture_cache: view BC images for raw reads of their layers instead of evicting them 2026-10-26 05:32:02 +01:00
nmzik be1c84f4d7 graphics: shorten the mesh draw skip warning 2026-10-26 05:32:02 +01:00
nmzik 560756f34c graphics: skip draws of mesh shaders that exceed host mesh limits 2026-10-26 05:32:02 +01:00
nmzik 95bbc9c65d graphics: hold image heap descriptors whose address another extent pins 2026-10-26 05:32:02 +01:00
nmzik 4db225008b graphics: resize image heap tables in place when their descriptor size changes 2026-10-26 05:32:02 +01:00
nmzik dc3bd68dee gpu: bound null storage bindings to zero bytes 2026-10-26 05:32:02 +01:00
nmzik c1dfb309a1 graphics: drop image heap table snapshots superseded at the same base 2026-10-26 05:32:02 +01:00
nmzik ba7f9969ef shader: bound storage buffers by pushed binding sizes instead of OpArrayLength 2026-10-26 05:32:02 +01:00
nmzik 463a096249 graphics: unwatch image heap pages on writes next to a table 2026-10-26 05:32:02 +01:00
b2c9ec7609 renderer: decode R8, R8G8 and R16_UINT color register clears (#1893)
DecodePackedColorClear had no case for R8_UNORM/UINT, R8G8_UNORM/UINT and
R16_UINT, so a CMASK fast clear of such a render target was dropped and the
target kept its old contents. UFC 6 (PPSA23566) fast-clears an R8_UINT
region map this way every frame and then writes only part of it; a capture
showed the map never cleared. DWORD fills of these formats are decoded only
when every pixel in the word holds the same value.

Co-authored-by: 4wgycvn84p-afk <346802885+4wgycvn84p-afk@users.noreply.github.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-25 18:47:45 +01:00
nmzik 83f8bfd3c9 pipeline: print a console message before the shader cache warm-up 2026-10-25 02:20:44 +02:00
nmzik dd5bc26c64 pipeline: write the shader store on a background thread 2026-10-25 02:20:44 +02:00
nmzik ec8b75b244 pipeline: persist shaders and pipelines per game and prewarm them at boot 2026-10-25 02:20:44 +02:00
nmzik 87e49282b8 pipeline: log real shader compiles to the console 2026-10-25 02:20:44 +02:00
nmzik 1816004357 shader: serialize resource plans for the shader cache 2026-10-25 02:20:44 +02:00
nmzik bfc377627a pipeline: create pipelines from GraphicsPipelineKey and shader modules 2026-10-25 02:20:44 +02:00
nmzik 4b651f2ba7 pipeline: fold the program cache into PipelineCache with stable module ids 2026-10-25 02:20:44 +02:00
nmzik dbc7b8b2ff pipeline: look up draw programs and pipelines from the command buffer 2026-10-24 05:18:46 +02:00
nmzik 269e411ef2 graphics: index live cache slots directly 2026-10-24 04:26:16 +02:00
nmzik 170c107779 texture_cache: dedupe region queries with a picked flag 2026-10-24 04:03:01 +02:00
nmzik 8dc0d56b7e common: SlotVector without generations 2026-10-24 03:48:46 +02:00
nmzik f356fa3730 gpu: move the BDA sync queue from MemoryTracker into BufferCache 2026-10-24 01:05:19 +02:00
nmzik 246d511568 graphics: count occlusion queries on the host GPU behind --occlusion-queries 2026-10-23 19:48:53 +02:00
Senaxx 77a8f30758 shader: read S_MEMREALTIME from the host device clock shifted to about 100 MHz 2026-10-23 19:48:53 +02:00
nmzik f9e14084d6 graphics: set the heap flag in ImageHeapResource 2026-10-23 07:22:33 +02:00
nmzik 38c884e8c1 graphics: keep image heap descriptors of unmapped textures null 2026-10-23 07:17:57 +02:00
nmzik 27dc7c281f graphics: keep bounded image heaps resident in a bindless descriptor set 2026-10-23 07:17:57 +02:00
nmzik 79837b423d graphics: support compute stores to 2D MSAA images 2026-10-22 22:11:06 +02:00
nmzikandArtyom Zabroda aafe014d0c shader: read raw D16 depth bits through kDepth k16UInt image loads
Co-authored-by: Artyom Zabroda <artyomzabroda@proton.me>
2026-10-22 22:11:06 +02:00
nmzik 86fed10b81 graphics: draw non-indexed and native-fetch indirect draws from GPU-read records 2026-10-22 16:12:20 +02:00
nmzik 949de19bb0 graphics: draw indexed indirect multi-draws from GPU-read arguments 2026-10-22 16:12:20 +02:00
nmzik c513a4a13a graphics: draw single indexed indirect draws from GPU-read arguments 2026-10-22 16:12:20 +02:00
Mr. Big Britches b54057942d texture cache: select color-metadata clears on the GPU with conditional rendering 2026-10-22 16:12:20 +02:00
nmzik b6495a5b67 texture cache: share color attachment rendering setup 2026-10-22 16:12:20 +02:00
nmzik 5b315a9ea7 gpu tiler: share compute pipeline creation 2026-10-22 16:12:20 +02:00
nmzik 5f5d6effa4 graphics: count DCC/CMASK metadata readbacks in the performance overlay 2026-10-22 16:12:20 +02:00
Arda Sahinandnmzik 8502d8a77d image: drop optional create flags the driver rejects instead of aborting (#1760)
* image: request extended usage only for storage images

* tests: restore block-texel-view support through the flag check loop order

---------

Co-authored-by: nmzik <Nmzik@mail.ru>
2026-10-22 03:56:13 +02:00
286481889f shader: emit float min/max as host instructions on AMD GPUs (#1761)
* shader: emit float min/max as host instructions on AMD GPUs

V_MIN_F32, V_MAX_F32, V_MIN3_F32 and V_MAX3_F32 were emulated with a
classify-and-select sequence of about a dozen instructions each, to give
the guest's NaN and signed-zero results on any host. AMD GPUs execute
GLSL.std.450 NMin/NMax with those same rules, so emit them directly when
the device is AMD and supports VK_KHR_shader_float_controls2. Each
instruction is decorated FPFastMathMode None, since
SignedZeroInfNanPreserve does not cover extended instructions. MED3 keeps
its exact emulation. KYTY_EMULATED_FLOAT_MIN_MAX=1 keeps the emulation.

In SAROS the two heaviest compute shaders get 37% and 59% faster on an
RX 9070 XT (RADV), about 4 ms of GPU time per frame.

Adds VectorMinMaxF32RuntimeEdges (runtime operands, so nothing is folded)
and a --float-min-max-only mode that runs it and
VectorMinMaxF32NanAndSignedZeroEdges with the emulation and, where
supported, with host instructions.

Developed with AI assistance (Claude Code).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* shader: gate host float min/max on RADV and check the emitted instructions

* shader: drop float controls 2 from host float min/max

* shader: drop the float min/max env override and atomic flag

* shader: pass host capabilities to the SPIR-V emitter as a profile built once per device

* shader: enable host float min/max on AMD GPUs

---------

Co-authored-by: arda <ardaeska@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: nmzik <Nmzik@mail.ru>
2026-10-21 21:36:08 +02:00
c07ad621f2 graphics: write small GPU-written tiled images back to guest memory behind --readback-tiled-images
Co-authored-by: Dimitar Vagalinski <275970482+overlordxrz-source@users.noreply.github.com>
Co-authored-by: Mr. Big Britches <111622360+MrBigBritches@users.noreply.github.com>
2026-10-21 20:55:02 +02:00
nmzik 13b291f998 gpu: honour DB_ALPHA_TO_MASK as alpha-to-coverage and keep its depth writes behind the shader 2026-10-21 19:17:50 +02:00
nmzik 7b7294aa03 gpu: drop attachments whose sample count differs from the raster when a draw mixes MSAA and single-sample targets 2026-10-21 19:17:50 +02:00
nmzikandLeandro Bras 4644c52927 graphics: initialize BDA tables before first buffer registration
Co-authored-by: Leandro Bras <shadowgaming.7@gmail.com>
2026-10-21 05:48:13 +02:00
nmzik 68d0ba5a81 shader: bound scalar-read overlap checks by the bytes fixed-offset buffer writes reach 2026-10-21 05:48:13 +02:00
nmzik 70668fbd98 gpu: drop global barriers for PM4 flush events and releases, ordering buffer-writing draws like dispatches 2026-10-21 02:02:25 +02:00