mirror of
https://github.com/KytyPS5/KytyPS5.git
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153 lines
7.3 KiB
C++
153 lines
7.3 KiB
C++
#include "graphics/shader/recompiler/frontend/translate/Translator.h"
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namespace Libs::Graphics::ShaderRecompiler::Frontend {
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IR::F32 Translator::SelectF32(IR::U1 condition, IR::F32 true_value, IR::F32 false_value) {
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return IR::F32(ir.Emit(IR::ValueOpcode::SelectF32, {condition, true_value, false_value}));
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}
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void Translator::V_CVT_F32_UBYTE(const Decoder::Instruction& inst, uint32_t byte_index) {
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const auto source = ReadU32(SourceAt(inst, 0));
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const auto byte = ir.Emit(IR::ValueOpcode::BitFieldUExtract,
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{source, IR::Value(byte_index * 8u), IR::Value(8u)});
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WriteOperand(DestinationOperand(inst), ir.Emit(IR::ValueOpcode::ConvertF32U32, {byte}));
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}
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void Translator::V_CVT_F32_U32(const Decoder::Instruction& inst) {
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WriteOperand(DestinationOperand(inst),
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ir.Emit(IR::ValueOpcode::ConvertF32U32, {ReadU32(SourceAt(inst, 0))}));
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}
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void Translator::V_CVT_F32_I32(const Decoder::Instruction& inst) {
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WriteOperand(DestinationOperand(inst),
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ir.Emit(IR::ValueOpcode::ConvertF32S32, {ReadU32(SourceAt(inst, 0))}));
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}
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void Translator::V_CVT_U32_F32(const Decoder::Instruction& inst) {
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const auto value = IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32));
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WriteOperand(DestinationOperand(inst), ir.Emit(IR::ValueOpcode::ConvertU32F32, {value}));
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}
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void Translator::V_CVT_I32_F32(const Decoder::Instruction& inst) {
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const auto value = IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32));
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WriteOperand(DestinationOperand(inst), ir.Emit(IR::ValueOpcode::ConvertS32F32, {value}));
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}
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void Translator::V_CVT_F16_F32(const Decoder::Instruction& inst) {
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WriteF16(DestinationOperand(inst), IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32)));
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}
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void Translator::V_CVT_F32_F16(const Decoder::Instruction& inst) {
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WriteOperand(DestinationOperand(inst), ReadF16AsF32(inst.src0));
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}
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void Translator::V_CVT_F16_16(const Decoder::Instruction& inst, bool signed_value) {
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const auto value = IR::F32(
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ir.Emit(signed_value ? IR::ValueOpcode::ConvertF32S32 : IR::ValueOpcode::ConvertF32U32,
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{ReadU16AsU32(inst.src0, signed_value)}));
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WriteF16(DestinationOperand(inst), value);
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}
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void Translator::V_CVT_16_F16(const Decoder::Instruction& inst, bool signed_value) {
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// The 32-bit conversion already saturates and maps NaN to zero.
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const auto converted = IR::U32(
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ir.Emit(signed_value ? IR::ValueOpcode::ConvertS32F32 : IR::ValueOpcode::ConvertU32F32,
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{ReadF16AsF32(inst.src0)}));
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Write16Bits(DestinationOperand(inst), Saturate16(converted, signed_value));
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}
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void Translator::V_CVT_RPI_I32_F32(const Decoder::Instruction& inst) {
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const auto source = IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32));
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const auto biased = IR::F32(ir.Emit(IR::ValueOpcode::FPAdd32, {source, IR::Value::F32(0.5f)}));
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const auto rounded = IR::F32(ir.Emit(IR::ValueOpcode::FPFloor32, {biased}));
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WriteOperand(DestinationOperand(inst), ir.Emit(IR::ValueOpcode::ConvertS32F32, {rounded}));
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}
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void Translator::V_CVT_FLR_I32_F32(const Decoder::Instruction& inst) {
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const auto source = IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32));
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const auto rounded = IR::F32(ir.Emit(IR::ValueOpcode::FPFloor32, {source}));
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WriteOperand(DestinationOperand(inst), ir.Emit(IR::ValueOpcode::ConvertS32F32, {rounded}));
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}
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void Translator::V_FREXP_EXP_I32_F32(const Decoder::Instruction& inst) {
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const auto source = IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32));
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const auto bits = ir.BitCastU32(source);
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const auto exponent =
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IR::U32(ir.Emit(IR::ValueOpcode::BitFieldUExtract, {bits, IR::Value(23u), IR::Value(8u)}));
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const auto mantissa = ir.BitwiseAnd(bits, IR::U32(IR::Value(0x007fffffu)));
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const auto normal = ir.ISub(exponent, IR::U32(IR::Value(126u)));
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const auto msb = IR::U32(ir.Emit(IR::ValueOpcode::FindUMsb32, {mantissa}));
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const auto subnormal = ir.ISub(msb, IR::U32(IR::Value(148u)));
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const auto denormal = ir.Select(ir.INotEqual(mantissa, IR::U32(IR::Value(0u))), subnormal,
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IR::U32(IR::Value(0u)));
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const auto finite =
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ir.Select(ir.INotEqual(exponent, IR::U32(IR::Value(0xffu))),
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ir.Select(ir.INotEqual(exponent, IR::U32(IR::Value(0u))), normal, denormal),
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IR::U32(IR::Value(0u)));
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WriteOperand(DestinationOperand(inst), finite);
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}
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void Translator::V_CVT_OFF_F32_I4(const Decoder::Instruction& inst) {
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const auto nibble =
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IR::U32(ir.Emit(IR::ValueOpcode::BitFieldSExtract,
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{ReadU32(SourceAt(inst, 0)), IR::Value(0u), IR::Value(4u)}));
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const auto value = IR::F32(ir.Emit(IR::ValueOpcode::ConvertF32S32, {nibble}));
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WriteOperand(DestinationOperand(inst),
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ir.Emit(IR::ValueOpcode::FPMul32, {value, IR::Value::F32(1.0f / 16.0f)}));
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}
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void Translator::V_CVT_PKRTZ_F16_F32(const Decoder::Instruction& inst) {
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const auto lhs = ApplyF32ResultModifiers(
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inst.dst, IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32)));
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const auto rhs = ApplyF32ResultModifiers(
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inst.dst, IR::F32(ReadOperand(SourceAt(inst, 1), IR::Type::F32)));
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WriteOperand(DestinationOperand(inst), ir.Emit(IR::ValueOpcode::PackFloat2x16Rtz, {lhs, rhs}));
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}
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void Translator::V_CVT_PKNORM_F32(const Decoder::Instruction& inst, IR::ValueOpcode opcode) {
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const auto lhs = ReadOperand(SourceAt(inst, 0), IR::Type::F32);
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const auto rhs = ReadOperand(SourceAt(inst, 1), IR::Type::F32);
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const auto pair = ir.Emit(IR::ValueOpcode::CompositeConstructF32x2, {lhs, rhs});
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WriteOperand(DestinationOperand(inst), ir.Emit(opcode, {pair}));
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}
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void Translator::V_CVT_PK_U8_F32(const Decoder::Instruction& inst) {
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const auto source = IR::F32(ReadOperand(SourceAt(inst, 0), IR::Type::F32));
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const auto byte =
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IR::U32(ir.Emit(IR::ValueOpcode::UMin32,
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{ir.Emit(IR::ValueOpcode::ConvertU32F32, {source}), IR::Value(255u)}));
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const auto index = ir.BitwiseAnd(ReadU32(SourceAt(inst, 1)), IR::U32(IR::Value(3u)));
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const auto shift = ir.ShiftLeftLogical(index, IR::U32(IR::Value(3u)));
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WriteOperand(DestinationOperand(inst),
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ir.Emit(IR::ValueOpcode::BitFieldInsert,
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{ReadU32(SourceAt(inst, 2)), byte, shift, IR::Value(8u)}));
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}
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void Translator::V_CVT_PK_16_32(const Decoder::Instruction& inst, bool signed_value) {
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WriteOperand(DestinationOperand(inst),
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PackU16Lanes(Saturate16(ReadU32(inst.src0), signed_value),
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Saturate16(ReadU32(inst.src1), signed_value)));
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}
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void Translator::V_PACK_B32_F16(const Decoder::Instruction& inst) {
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WriteOperand(DestinationOperand(inst),
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PackU16Lanes(Read16LaneBits(inst.src0, false), Read16LaneBits(inst.src1, false)));
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}
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IR::U32 Translator::PackU16Lanes(IR::U32 low, IR::U32 high) {
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// A zero high lane zero-extends; descriptor tracking bounds a mask, not a bitfield insert.
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if (high == IR::Value(0u)) return ir.BitwiseAnd(low, IR::U32(IR::Value(0xffffu)));
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return IR::U32(
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ir.Emit(IR::ValueOpcode::BitFieldInsert, {low, high, IR::Value(16u), IR::Value(16u)}));
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}
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IR::U32 Translator::Saturate16(IR::U32 value, bool signed_value) {
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if (!signed_value) {
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return IR::U32(ir.Emit(IR::ValueOpcode::UMin32, {value, IR::Value(0xffffu)}));
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}
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const auto low = ir.Emit(IR::ValueOpcode::SMax32, {value, IR::Value(0xffff8000u)});
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return IR::U32(ir.Emit(IR::ValueOpcode::SMin32, {low, IR::Value(0x7fffu)}));
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}
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} // namespace Libs::Graphics::ShaderRecompiler::Frontend
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