mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-27 16:02:37 +00:00
Preserve PS5 mip-tail views and GPU data during image expansion
Related work: https://github.com/KytyPS5/KytyPS5/pull/558 Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
This commit is contained in:
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c1dccd7db1
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4 files changed
+101
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@@ -86,6 +86,7 @@ struct TileMipLayout {
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uint32_t padded_height = 0;
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uint32_t tail_x = 0;
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uint32_t tail_y = 0;
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bool operator==(const TileMipLayout&) const = default;
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};
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struct TileSurfaceLayout {
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+14
-3
@@ -208,6 +208,10 @@ bool TextureCache::SameBacking(const ImageInfo& cached, const ImageInfo& request
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if (cached.extent != requested.extent) {
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return false;
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}
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if (cached.resources.levels < requested.resources.levels ||
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cached.resources.layers < requested.resources.layers) {
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return false;
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}
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if (cached.samples != requested.samples) {
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return false;
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}
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@@ -843,6 +847,16 @@ TextureCache::OverlapResult TextureCache::ResolveOverlap(const ImageInfo& reques
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ImageViewOps::FormatsCompatible(cached.info.pixel_format, requested.pixel_format)) {
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return {ExpandImage(requested, cached_id)};
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}
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// PS5 mip tails can expose more levels without increasing the guest allocation.
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if (requested.pixel_format == cached.info.pixel_format &&
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requested.type == cached.info.type && requested.resources > cached.info.resources &&
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(requested.data.size > cached.info.data.size ||
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(requested.data.size == cached.info.data.size &&
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requested.extent == cached.info.extent &&
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cached.info.resources.levels > 1 &&
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requested.resources.layers == cached.info.resources.layers))) {
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return {ExpandImage(requested, cached_id)};
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}
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if (requested.pixel_format != cached.info.pixel_format ||
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requested.data.size <= cached.info.data.size) {
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const auto result_id = merged_id ? merged_id : cached_id;
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@@ -852,9 +866,6 @@ TextureCache::OverlapResult TextureCache::ResolveOverlap(const ImageInfo& reques
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? result_id
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: ImageId {}};
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}
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if (requested.type == cached.info.type && requested.resources > cached.info.resources) {
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return {ExpandImage(requested, cached_id)};
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}
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EXIT("TextureCache: unresolvable equal-address image overlap, address=0x%016" PRIx64
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" requested=%ux%u "
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"cached=%ux%u requested_size=0x%016" PRIx64 " cached_size=0x%016" PRIx64
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@@ -293,13 +293,8 @@ static bool IsSupportedStorageTextureDescriptor(const ShaderRecompiler::IR::Imag
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const bool supported_swizzle =
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IsValidImageSwizzle(swizzle) &&
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(swizzle == DstSel(4, 5, 6, 7) || !resource.read || resource.atomic);
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const auto max_mip = resource.r128 ? descriptor.LastLevel() : descriptor.MaxMip();
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const auto view_last_level =
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resource.mip_mode == ShaderRecompiler::IR::ImageMipMode::DynamicStorage
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? descriptor.LastLevel()
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: std::min(descriptor.LastLevel(), max_mip);
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return (is_1d || is_1d_array || is_2d || is_2d_array || is_3d) && supported_tile &&
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descriptor.BaseLevel() <= view_last_level && view_last_level <= max_mip &&
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descriptor.BaseLevel() <= descriptor.LastLevel() &&
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descriptor.MinLod() == 0 && supported_swizzle && descriptor.BCSwizzle() == 0 &&
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!descriptor.MsaaDepth();
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}
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@@ -507,6 +502,21 @@ static ImageViewInfo TextureViewInfo(const ShaderRecompiler::IR::ImageResource&
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return view;
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}
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static bool TextureViewPreservesMipLayout(const TileSurfaceDescription& description,
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uint32_t view_levels) {
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TileSurfaceLayout physical {};
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TileSurfaceLayout view {};
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auto view_description = description;
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view_description.levels = view_levels;
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return TileGetTiledTextureLayout(description, physical) &&
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TileGetTiledTextureLayout(view_description, view) &&
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physical.first_tail_level == view.first_tail_level &&
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physical.block_slice_size == view.block_slice_size &&
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physical.total_size == view.total_size &&
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std::equal(std::begin(physical.mips), std::begin(physical.mips) + description.levels,
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std::begin(view.mips));
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}
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TextureBinding RenderExecutor::ResolveTexture(const ShaderRecompiler::IR::ImageResource& resource,
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const ShaderRecompiler::IR::DescriptorValue& value) {
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auto descriptor = DecodeNativeDescriptor<ShaderTextureResource>(value);
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@@ -523,24 +533,22 @@ TextureBinding RenderExecutor::ResolveTexture(const ShaderRecompiler::IR::ImageR
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return {id, nullptr, std::move(desc)};
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}
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const auto address = descriptor.Base40();
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const auto width = static_cast<uint32_t>(descriptor.Width5()) + 1u;
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const auto height = static_cast<uint32_t>(descriptor.Height5()) + 1u;
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const auto base_level = descriptor.BaseLevel();
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const auto last_level = descriptor.LastLevel();
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const auto type = TextureType(descriptor);
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const bool multisampled = IsMultisampledTexture(type);
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const auto max_mip = resource.r128 ? last_level : descriptor.MaxMip();
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const auto levels = multisampled ? 1u : static_cast<uint32_t>(max_mip) + 1u;
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const bool dynamic_storage =
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storage && resource.mip_mode == ShaderRecompiler::IR::ImageMipMode::DynamicStorage;
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const auto view_last_level =
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!multisampled && !dynamic_storage ? std::min(last_level, max_mip) : last_level;
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const auto address = descriptor.Base40();
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const auto width = static_cast<uint32_t>(descriptor.Width5()) + 1u;
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const auto height = static_cast<uint32_t>(descriptor.Height5()) + 1u;
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const auto base_level = descriptor.BaseLevel();
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const auto last_level = descriptor.LastLevel();
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const auto type = TextureType(descriptor);
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const bool multisampled = IsMultisampledTexture(type);
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const auto max_mip = resource.r128 ? last_level : descriptor.MaxMip();
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const auto physical_levels = multisampled ? 1u : static_cast<uint32_t>(max_mip) + 1u;
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const auto levels =
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multisampled ? 1u : std::max(physical_levels, static_cast<uint32_t>(last_level) + 1u);
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const auto tile = descriptor.TileMode();
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const bool depth_tile = tile == Prospero::TileMode::kDepth;
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const bool msaa_tile = depth_tile || tile == Prospero::TileMode::kRenderTarget;
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const bool msaa_array = type == Prospero::ImageType::kColor2DMsaaArray;
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if ((!multisampled && (base_level > view_last_level || view_last_level >= levels)) ||
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if ((!multisampled && base_level > last_level) ||
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(multisampled &&
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(base_level != 0 || last_level == 0 || last_level > 3 || max_mip != last_level ||
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!msaa_tile || (descriptor.MsaaDepth() && !depth_tile) ||
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@@ -559,7 +567,7 @@ TextureBinding RenderExecutor::ResolveTexture(const ShaderRecompiler::IR::ImageR
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}
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const auto samples = multisampled ? 1u << last_level : 1u;
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const auto view_levels =
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multisampled ? 1u : static_cast<uint32_t>(view_last_level - base_level) + 1u;
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multisampled ? 1u : static_cast<uint32_t>(last_level - base_level) + 1u;
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const auto depth = static_cast<uint32_t>(descriptor.Depth()) + 1u;
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const auto format = descriptor.Format();
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const auto surface_format = TextureGetSurfaceFormatInfo(format);
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@@ -578,7 +586,19 @@ TextureBinding RenderExecutor::ResolveTexture(const ShaderRecompiler::IR::ImageR
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type == Prospero::ImageType::kColor2DArray ||
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type == Prospero::ImageType::kColor2DMsaaArray;
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const auto image_layers = layered ? depth : 1u;
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uint32_t pitch = 0;
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if (levels > physical_levels) {
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const TileSurfaceDescription physical {
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format, tile, volume ? TileSurfaceDimension::Dim3D : TileSurfaceDimension::Dim2D,
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width, height, volume ? depth : 1u, physical_levels, image_layers};
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// Texture mip views take precedence over the resource count, but must keep its storage layout.
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if (!TextureViewPreservesMipLayout(physical, levels)) {
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EXIT("unsupported texture mip view changes physical layout: base=%u last=%u max=%u "
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"extent=%ux%ux%u tile=%u\n",
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base_level, last_level, max_mip, width, height, depth,
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static_cast<uint32_t>(tile));
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}
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}
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uint32_t pitch = 0;
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TileSizeAlign size {};
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if (multisampled) {
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const auto bytes = Prospero::NumBytesPerElement(format);
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@@ -591,8 +611,8 @@ TextureBinding RenderExecutor::ResolveTexture(const ShaderRecompiler::IR::ImageR
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size.size *= image_layers;
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} else {
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pitch = TileGetTexturePitch(format, width, tile);
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TileGetTextureTotalSize(format, width, height, volume ? depth : image_layers, levels, tile,
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volume, size);
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TileGetTextureTotalSize(format, width, height, volume ? depth : image_layers,
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physical_levels, tile, volume, size);
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}
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EXIT_NOT_IMPLEMENTED(size.size == 0 || size.align == 0 ||
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(address & (static_cast<uint64_t>(size.align) - 1u)) != 0);
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@@ -629,7 +649,7 @@ TextureBinding RenderExecutor::ResolveTexture(const ShaderRecompiler::IR::ImageR
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!desc.info.IsDepth()) {
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TileSizeAlign metadata_size {};
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(void)TileGetDccSize(width, height, volume ? depth : image_layers,
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desc.info.bytes_per_block, levels, tile, metadata_size,
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desc.info.bytes_per_block, physical_levels, tile, metadata_size,
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std::countr_zero(samples));
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desc.info.metadata.kind = ImageMetadataKind::Dcc;
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desc.info.metadata.range = {descriptor.MetaAddr() << 8u, metadata_size.size};
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@@ -8594,7 +8594,8 @@ public:
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std::vector<u32> ReadCachedTexel(const char *name, RenderContext &context,
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ImageId id, vk::Offset3D offset = {},
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vk::Extent3D extent = {1, 1, 1}, uint32_t layer = 0) {
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vk::Extent3D extent = {1, 1, 1}, uint32_t layer = 0,
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uint32_t mip = 0) {
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auto &scheduler = context.GetCommandScheduler();
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auto &image = context.GetTextureCache().GetImage(id);
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const auto bytes = image.info.bytes_per_block * extent.width *
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@@ -8607,7 +8608,7 @@ public:
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scheduler.Current().Handle());
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vk::BufferImageCopy copy{};
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copy.imageSubresource = {image.info.IsDepth() ? vk::ImageAspectFlagBits::eDepth
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: vk::ImageAspectFlagBits::eColor, 0, layer, 1};
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: vk::ImageAspectFlagBits::eColor, mip, layer, 1};
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copy.imageOffset = offset;
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copy.imageExtent = extent;
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scheduler.Current().Handle().copyImageToBuffer(
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@@ -9602,6 +9603,9 @@ public:
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constexpr uint64_t allocation_alignment = 0x10000;
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constexpr uint64_t depth_address = base + 0x40000;
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constexpr uint64_t stencil_address = base + 0x70000;
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constexpr uint64_t mipped_storage_address = base + 0x100000;
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constexpr uint32_t tail_backing_value = 0x2468ace0u;
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constexpr uint32_t tail_gpu_value = 0x13579bdfu;
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EnsureRuntimeContext();
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int64_t direct_offset = -1;
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@@ -9618,6 +9622,8 @@ public:
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mapped == reinterpret_cast<void *>(base),
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"descriptor discovery fixed mapping failed");
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std::memset(mapped, 0, allocation_size);
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std::fill_n(reinterpret_cast<uint32_t *>(mipped_storage_address),
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0x10000 / 4, tail_backing_value);
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{
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RenderContext context(m_runtime_context);
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@@ -9884,17 +9890,17 @@ public:
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storage_descriptor.dwords.begin());
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storage_descriptor.dword_count = 8;
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auto mipped_storage = storage;
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constexpr uint64_t mipped_storage_address = base + 0x100000;
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const auto encoded_mipped_storage_address = mipped_storage_address >> 8u;
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mipped_storage.fields[0] =
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static_cast<uint32_t>(encoded_mipped_storage_address);
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mipped_storage.fields[1] =
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static_cast<uint32_t>(encoded_mipped_storage_address >> 32u) |
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(static_cast<uint32_t>(stencil_format) << 20u) | (3u << 30u);
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mipped_storage.fields[2] = 1u | (7u << 14u);
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(static_cast<uint32_t>(Prospero::BufferFormat::k32UInt) << 20u) |
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(3u << 30u);
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mipped_storage.fields[2] = 15u | (63u << 14u);
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mipped_storage.fields[3] =
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DstSel(4, 5, 6, 7) | (1u << 12u) | (3u << 16u) |
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(static_cast<uint32_t>(linear) << 20u) |
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(static_cast<uint32_t>(Prospero::TileMode::kStandard64KB) << 20u) |
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(static_cast<uint32_t>(Prospero::ImageType::kColor2D) << 28u);
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mipped_storage.fields[5] = 0x00700000u | (3u << 4u);
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ShaderRecompiler::IR::DescriptorValue mipped_storage_descriptor{};
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@@ -9911,6 +9917,14 @@ public:
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std::end(overwide_mipped_storage.fields),
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overwide_mipped_storage_descriptor.dwords.begin());
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overwide_mipped_storage_descriptor.dword_count = 8;
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#if KYTY_PLATFORM != KYTY_PLATFORM_WINDOWS
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ExpectFatal("MipViewPhysicalLayoutChange", [&] {
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auto linear_view = overwide_mipped_storage_descriptor;
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linear_view.dwords[3] &= ~(0x1fu << 20u);
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(void)RenderExecutorTestAccess::ResolveTexture(executor, storage_resource,
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linear_view);
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});
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#endif
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auto mipped_storage_resource = storage_resource;
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mipped_storage_resource.mip_mode =
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ShaderRecompiler::IR::ImageMipMode::DynamicStorage;
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@@ -9925,6 +9939,11 @@ public:
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auto plain_mipped_storage_binding =
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RenderExecutorTestAccess::ResolveTexture(executor, storage_resource,
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mipped_storage_descriptor);
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vk::ClearValue tail_clear{};
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tail_clear.color.uint32[0] = tail_gpu_value;
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TextureCacheTestAccess::ClearImage(
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texture_cache, scheduler.Current(), plain_mipped_storage_binding.image_id,
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{vk::ImageAspectFlagBits::eColor, 0, 4, 0, 1}, tail_clear);
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auto mipped_storage_binding = RenderExecutorTestAccess::ResolveTexture(
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executor, mipped_storage_resource, mipped_storage_descriptor);
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auto overwide_mipped_storage_binding =
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@@ -9933,6 +9952,16 @@ public:
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auto sampled_overwide_resolved = RenderExecutorTestAccess::ResolveTexture(
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executor, sampled_overwide_resource,
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overwide_mipped_storage_descriptor);
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const auto tail0 = ReadCachedTexel(name, context, overwide_mipped_storage_binding.image_id);
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const auto tail3 = ReadCachedTexel(name, context, overwide_mipped_storage_binding.image_id,
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{}, {1, 1, 1}, 0, 3);
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const auto tail4 = ReadCachedTexel(name, context, overwide_mipped_storage_binding.image_id,
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{}, {1, 1, 1}, 0, 4);
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Require(name, "expanded tail preserves GPU and backing data",
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tail0 == std::vector<u32>{tail_gpu_value} &&
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tail3 == std::vector<u32>{tail_gpu_value} &&
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tail4 == std::vector<u32>{tail_backing_value},
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"expanding a shared mip tail lost GPU writes or the added mip's backing bytes");
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PreparedBindings mipped_prepared{};
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ShaderRecompiler::IR::CompiledShaderInfo mipped_program{};
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mipped_program.info.images.push_back(storage_resource);
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@@ -9994,23 +10023,22 @@ public:
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overwide_mipped_storage.MaxMip() == 3 &&
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overwide_mipped_binding.image_id ==
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plain_mipped_binding.image_id &&
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overwide_mipped_binding.desc.info.resources.levels == 4 &&
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overwide_mipped_binding.desc.info.resources.levels == 5 &&
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overwide_mipped_binding.desc.view_info.base_level == 1 &&
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overwide_mipped_binding.desc.view_info.level_count == 3 &&
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overwide_mipped_binding.desc.view_info.level_count == 4 &&
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overwide_mipped_binding.mip_views.empty() &&
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overwide_mipped_binding.image_view ==
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plain_mipped_binding.image_view,
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"fixed storage view was not intersected with its physical mip "
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"range before Vulkan acquisition");
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"fixed storage view lost addressable mips in the allocated tail");
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Require(name, "over-wide sampled mip view",
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sampled_overwide_binding.image_id ==
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plain_mipped_binding.image_id &&
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sampled_overwide_binding.desc.info.resources.levels == 4 &&
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sampled_overwide_binding.desc.info.resources.levels == 5 &&
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sampled_overwide_binding.desc.view_info.base_level == 1 &&
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sampled_overwide_binding.desc.view_info.level_count == 3 &&
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sampled_overwide_binding.desc.view_info.level_count == 4 &&
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sampled_overwide_binding.mip_views.empty() &&
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sampled_overwide_binding.image_view != nullptr,
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"sampled view was not intersected with its physical mip range");
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"sampled view lost addressable mips in the allocated tail");
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auto srgb_storage = storage;
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constexpr auto srgb_format =
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static_cast<uint32_t>(Prospero::BufferFormat::k8_8_8_8Srgb);
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@@ -27983,12 +28011,6 @@ ShaderTextureResource AtomicStorageTextureDescriptor() {
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descriptor.fields[3] =
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(descriptor.fields[3] & ~(0x1fu << 20u)) |
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(static_cast<uint32_t>(Prospero::TileMode::kStandard256B) << 20u);
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} else if (std::strcmp(kind, "base-mip-out-of-resource") == 0) {
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descriptor.fields[3] |= (1u << 12u) | (1u << 16u);
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} else if (std::strcmp(kind, "dynamic-mip-out-of-resource") == 0) {
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resource.mip_mode = ShaderRecompiler::IR::ImageMipMode::DynamicStorage;
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resource.mip_count = 2;
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descriptor.fields[3] |= 1u << 16u;
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} else if (std::strcmp(kind, "inverted-mip-range") == 0) {
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descriptor.fields[3] |= 1u << 12u;
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descriptor.fields[5] |= 1u << 4u;
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@@ -28460,8 +28482,6 @@ void CheckBasicStorageTextureDescriptor() {
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for (const char *kind : {"resource",
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"type",
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"standard256b-volume",
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"base-mip-out-of-resource",
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"dynamic-mip-out-of-resource",
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"inverted-mip-range",
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"swizzle",
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"linear-rgb1-read",
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