nmzik
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ee034be4b2
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shader: rely on robustBufferAccess2 for storage buffer bounds
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2026-10-31 03:04:38 +01:00 |
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nmzik
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4919fdb6e6
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shader: validate the IR once, at SPIR-V emission
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2026-10-30 10:12:37 +01:00 |
|
Artyom Zabroda
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0c2546e850
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shader: lower whole-wave OR scans to subgroup reductions
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2026-10-30 04:31:24 +01:00 |
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nmzik
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1703836d06
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shader: type packed integer vertex inputs by their component type
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2026-10-30 02:59:36 +01:00 |
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nmzik
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5eab0ec738
|
shader: add BVH8 intersections and instance transforms
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2026-10-29 18:37:29 +01:00 |
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nmzik
|
bfd4c34b88
|
shader: add BVH stack operations
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2026-10-29 18:37:29 +01:00 |
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nmzik
|
5e837a9bea
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shader: share formatted indirect buffer load emission
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2026-10-29 05:52:04 +01:00 |
|
Çağatay Güçlü
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f71da54b9b
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shader: support fractional-even tessellation spacing
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2026-10-29 05:52:04 +01:00 |
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Çağatay Güçlü
|
143f640706
|
shader: preserve counterclockwise tessellation output
|
2026-10-29 05:52:04 +01:00 |
|
Çağatay Güçlü
|
128c938514
|
shader: support quad tessellation domains and factor routing
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2026-10-28 22:09:39 +01:00 |
|
nmzik
|
a5b3673a39
|
graphics: draw patched-offset indirect draws from GPU-read records
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2026-10-27 10:13:15 +01:00 |
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nmzik
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db12f0c5fb
|
shader: select consecutive GPU-selected sampler table entries without a switch
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2026-10-27 04:23:01 +01:00 |
|
Claxten
|
95a507a8ff
|
shader: support 64-bit buffer atomic minimum
|
2026-10-27 04:23:01 +01:00 |
|
 nmzikandshadowbeat070
|
78adb9293d
|
shader: give A16 1D and late 3D gradients their own address VGPRs
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
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2026-10-27 04:23:01 +01:00 |
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nmzik
|
5429888d4c
|
shader: keep pixel helper lanes out of the EXEC and VCC words
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2026-10-26 07:43:11 +01:00 |
|
shadowbeat070
|
ceb154d9e4
|
shader: acquire stored buffers and images at S_BARRIER
|
2026-10-26 05:32:02 +01:00 |
|
  
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26ca609236
|
shader: type pixel outputs of UINT and SINT render targets as integer vectors
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
|
2026-10-26 05:32:02 +01:00 |
|
 nmzikandSenaxx
|
4ebae87a1b
|
shader: apply the LOD clamp of image_sample _cl variants
Co-authored-by: Senaxx <michelbeld@gmail.com>
|
2026-10-26 05:32:02 +01:00 |
|
 
|
6357740fa1
|
shader: lower wave32 whole-wave UMin and UMax reductions to subgroup reductions
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
|
2026-10-26 05:32:02 +01:00 |
|
nmzik
|
ba7f9969ef
|
shader: bound storage buffers by pushed binding sizes instead of OpArrayLength
|
2026-10-26 05:32:02 +01:00 |
|
nmzik
|
72903bfce6
|
shader: use the V_PERMLANE16 row directly instead of copying it
|
2026-10-25 02:20:44 +02:00 |
|
nmzik
|
59d8256b36
|
shader: encode 11/10-bit float formatted buffer stores as truncated unsigned floats
|
2026-10-25 02:20:44 +02:00 |
|
nmzik
|
9a20c6f738
|
shader: disable DPP16 writes from EXEC-disabled sources without BOUND_CTRL
|
2026-10-25 02:20:44 +02:00 |
|
nmzik
|
67c89e0915
|
shader: keep the old V_PERMLANE16 destination for inactive sources without BOUND_CTRL
|
2026-10-25 02:20:44 +02:00 |
|
TheCruZ
|
e864cb20bd
|
shader: clamp V_FRACT_F16/F32/F64 results below one
|
2026-10-25 02:20:44 +02:00 |
|
Senaxx
|
77a8f30758
|
shader: read S_MEMREALTIME from the host device clock shifted to about 100 MHz
|
2026-10-23 19:48:53 +02:00 |
|
Senaxx
|
706aa030ad
|
shader: extract 9-bit NGG primitive vertex indices, leaving the edge flags out
|
2026-10-23 19:48:53 +02:00 |
|
Felipe
|
9dcff95e80
|
shader: fix crash from packed ancillary used as DPP old operand (#1769)
shader: emit plain EXEC selects for DPP writes that reach every active lane (Street Fighter 6)
|
2026-10-23 09:51:32 +02:00 |
|
nmzik
|
27dc7c281f
|
graphics: keep bounded image heaps resident in a bindless descriptor set
|
2026-10-23 07:17:57 +02:00 |
|
nmzik
|
79837b423d
|
graphics: support compute stores to 2D MSAA images
|
2026-10-22 22:11:06 +02:00 |
|
 nmzikandArtyom Zabroda
|
aafe014d0c
|
shader: read raw D16 depth bits through kDepth k16UInt image loads
Co-authored-by: Artyom Zabroda <artyomzabroda@proton.me>
|
2026-10-22 22:11:06 +02:00 |
|
nmzik
|
a951a91703
|
spirv: emit OpName only with debug info
|
2026-10-22 22:11:06 +02:00 |
|
 Nawid3333andnmzik
|
d7c1896647
|
shader: interpolate f16 parameter halves (V_INTERP_P1LL_F16, V_INTERP_P2_F16) (#1792)
shader: interpolate packed f16 attributes for v_interp_p1ll_f16 and v_interp_p2_f16
Co-authored-by: nmzik <Nmzik@mail.ru>
|
2026-10-22 04:54:10 +02:00 |
|
Nawid3333
|
919fac13d0
|
shader: read lane 0 in V_READFIRSTLANE when EXEC is zero instead of an undefined lane
|
2026-10-22 01:20:54 +02:00 |
|
nmzik
|
a52d1ed4e2
|
shader: drop the 64-bit min/max NaN-lhs select the ordered compare already covers
|
2026-10-22 01:09:09 +02:00 |
|
nmzik
|
a3aece2762
|
shader: check the DPP source lane bound only for row shifts
|
2026-10-22 01:02:38 +02:00 |
|
nmzik
|
64186404a3
|
shader: load the DPP lane id once for both partial write masks
|
2026-10-22 01:01:38 +02:00 |
|
nmzik
|
11465a5e3c
|
shader: drop the large-input select before sin and cos since fract already returns zero
|
2026-10-22 00:44:43 +02:00 |
|
nmzik
|
09a9654458
|
shader: compute DPP permute, rotate, mirror and share lanes with bit-field and XOR ops
|
2026-10-22 00:40:07 +02:00 |
|
nmzik
|
6123419437
|
shader: skip full DPP row and bank masks and test partial ones with one bit extract
|
2026-10-22 00:35:09 +02:00 |
|
nmzik
|
8177969f33
|
shader: branch to the pixel kill on the inverted targets instead of negating the condition
|
2026-10-22 00:33:07 +02:00 |
|
nmzik
|
ce54aa8d14
|
shader: return the first source when both 64-bit min/max inputs are NaN
|
2026-10-22 00:28:43 +02:00 |
|
nmzik
|
3bb09ed2a4
|
shader: clamp before float-to-int conversion and drop the redundant truncate
|
2026-10-22 00:26:40 +02:00 |
|
nmzik
|
1e4ac1371d
|
shader: return the first source when both float min/max inputs are NaN
|
2026-10-22 00:00:04 +02:00 |
|
nmzik
|
93071ebdf8
|
shader: drop the denormal flush before exp2
|
2026-10-21 23:33:42 +02:00 |
|
nmzik
|
3a842e1a6b
|
shader: flush FP32 denormals with a float compare and multiply instead of bit masks
|
2026-10-21 23:33:42 +02:00 |
|
nmzik
|
0f7d112545
|
shader: emit constant-true guarded blocks inline and fold immediate constant-buffer indices
|
2026-10-21 23:27:04 +02:00 |
|
nmzik
|
10a852c2ac
|
shader: pack 16-bit lane pairs with one bit-field insert
|
2026-10-21 22:46:04 +02:00 |
|
nmzik
|
4a1440197f
|
shader: share one find-first-bit lowering for S_FF0/FF1/FLBIT_I32_B64 and remove FindUMsb64
|
2026-10-21 22:39:34 +02:00 |
|
nmzik
|
6e5167598e
|
shader: compute add-with-carry with compares and remove IAddCarry32
|
2026-10-21 22:28:11 +02:00 |
|